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Automatic RF MESFET Amplifier
Drain-Current Controllers
Table 16. IPDAC1 and IPDAC2 (Write)
BIT NAME
X
DAC11–DAC0
DATA BIT
D15–D12
D11–D0
RESET STATE
X
0000 0000 0000
FUNCTION
Don’t care.
DAC11 is the MSB and DAC0 is the LSB. Data format is straight binary.
Table 17. THRUDAC1 and THRUDAC2 (Write)
BIT NAME
X
DAC11–DAC0
DATA BIT
D15–D12
D11–D0
RESET STATE
X
N/A
FUNCTION
Don’t care.
DAC11 is the MSB and DAC0 is the LSB. Data format is straight binary.
Table 18. PGACAL (Write)
BIT NAME
X
DATA BIT
D15–D5
RESET STATE
X
Don’t care.
FUNCTION
Channel 2 high-side calibration bit. Set to 1 to short circuit the current-
HVCAL2
D4
0
sense amplifier inputs so that only the offset is apparent at the
PGAOUT2 output and the channel 2 current-sense conversion.
Channel 1 high-side calibration bit. Set to 1 to short circuit the current-
HVCAL1
D3
0
sense amplifier inputs so that only the offset is apparent at the
PGAOUT1 output and the channel 1 current-sense conversion.
Acquisition/tracking bit. Set to 0 to force the next current-sense
TRACK
D2
0
calibration to run in acquisition mode. Set to 1 to force the next
calibration to run in tracking mode. Set TRACK to 0 the first time through
a calibration.
Dual calibration bit. Set to 1 to run a current-sense self-calibration routine
in both channels 1 and 2. At the end of the calibration routine, DOCAL is
DOCAL
D1
0
set to 0. When DOCAL and SELFTIME are both set to 1, the internal timer
is reset at the end of the routine and waits another 13ms before
performing the next self-timed calibration.
Self-time bit. Set to 1 to perform a calibration of the current-sense
SELFTIME
D0
0
amplifier in both channels 1 and 2 on a self-timed periodic basis
(approximately every 15ms). When set to the default state of 0,
calibration only occurs when DOCAL is set to 1.
THRUDAC1 and THRUDAC2 (Write)
Write to the channel 1/channel 2 DAC input and output
registers to load the DAC code directly to the respec-
tive DAC output and bypass a V DAC(CODE) calculation.
Set the command byte to 4Ah and 4Eh, respectively, to
write to the channel 1/channel 2 DAC input and output
registers. See Table 17. Bits D15–D12 are don’t care.
Bits D11–D0 contain the straight binary data.
Writing to these registers overwrites any previous val-
ues loaded from the V DAC(CODE) calculation.
PGACAL (Write)
Write to the PGA calibration control register to calibrate
the channel 1 and channel 2 current-sense amplifiers.
Set the command byte to 5Eh to write to the PGA cali-
bration control register. See Table 18. Bits D15–D5 are
don’t care. Set the HVCAL2 bit, D4, to 1 to short circuit
the channel 2 current-sense amplifier inputs so that
only the offset is apparent at the PGAOUT2 output. Set
the HVCAL1 bit, D3, to 1 short circuit the channel 1 cur-
rent-sense amplifier inputs so that only the offset is
apparent at the PGAOUT1 output. Determine the input
channel offset (+12mV, typ) by setting the HVCAL_bits
and commanding a sense-voltage ADC conversion.
44
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